Logic Function and Boolean Algebra

1.
A logic function is an expression algebraically with binary variables, logical operation symbols, parenthesis and equal sign, is known as Boolean function.

AND GATE
OR GATE
Generates true or 1 only if all the inputs are true or 1.
Generates true or 1 if any of input s is true or 1.
It implements the logical function called conjunction.
It implements the logical function called disjunction.

2.
Logic gates perform basic logical functions and are the fundamental building blocks of digital integrated circuits. Most logic gates take an input of two binary values, and output a single value of a 1 or 0.

NAND GATE
NOR GATE
AND followed byt NOT
OR followed by NOT
Generates false only if both the inputs are true.
Generates true only if both the inputs are false.
It implements the logical function called conjunction.
It implements the logical function called disjunction.

The truth-table of NAND gate is:
A
B
Output
0
0
1
0
1
1
1
0
1
1
1
0

The truth-table of NOR gate is:
A
B
Output
0
0
1
0
1
0
1
0
0
1
1
0

3.
The XOR (exclusive-OR) gate acts in the same way as the logical "either/or." The output is "true" if either, but not both, of the inputs are "true." The output is "false" if both inputs are "false" or if both inputs are "true." Another way of looking at this circuit is to observe that the output is 1 if the inputs are different, but 0 if the inputs are the same.
The X-OR gate symbol is given below:


The truth table of X-OR gate is given below:
A
B
Output
0
0
0
0
1
1
1
0
1
1
1
0

The XNOR (exclusive-NOR) gate is a combination XOR gate followed by an inverter. Its output is "true" if the inputs are the same and "false" if the inputs are different.
The X-NOR gate symbol is given below:


The truth table of X-NOR gate is given below:
A
B
Output
0
0
1
0
1
0
1
0
0
1
1
1


4.
Boolean algebra is a study of mathematical operations performed on certain variables (called binary variables) that can have only two values: true (represented by 1) or false (represented by 0).
  1. AND Gate: AND gate generates true output if all the inputs are true, otherwise it generates false output. It is denoted by (.) operator and graphically represented by:

A
B
Output
0
0
0
0
1
0
1
0
0
1
1
1

  1. OR Gate: OR gate generates true if at least any one of the input is true, otherwise it generates false output. It is denoted by(+) operator and graphically represented by:


A
B
Output
0
0
0
0
1
1
1
0
1
1
1
1

  1. NOT Gate: It is also known as inverter. It inverts the input state from true to false and vice versa. It is denoted by (­_) or (') operator and graphically represented by:


A
Output
0
1
1
0

  1. NAND Gate: NAND gate generates true output if at least any of the input is false otherwise, it generates false output. Graphically it is represented by:


A
B
Output
0
0
1
0
1
1
1
0
1
1
1
0


5.
There are 2 De Morgan's laws or theorems:
  1. Theorem 1: The complement of a sum of variables is equal to the product of the complement of each variables.
(A+B)' = A'.B'

A
B
A'
B'
A+B
(A+B)'
A'.B'
0
0
1
1
0
1
1
0
1
1
0
1
0
0
1
0
0
1
1
0
0
1
1
0
0
1
0
0

Here, (A+B)' = A'.B' thus proved.

  1. Theorem 2: The complement of a product of variables is equal to the sum of the complement of each variables.
(A.B)' = A' + B'

A
B
A'
B'
A.B
(A.B)'
A'+B'
0
0
1
1
0
1
1
0
1
1
0
0
1
1
1
0
0
1
0
1
1
1
1
0
0
1
0
0

Here, (A.B)' = A' + B' thus proved.


6.
Duality principle state can be obtained by replacing AND (.) with OR (+) and vice versa, 1 with 0 and vice versa keeping variables and complements and variables are unchanged.
For example, duality of the expression A.B' = A+B' and A'.B+C = A'+B.C


7.
a.
Here, A.(B +C) = A+(B.C)

b.
Here, A.B + C.1 + 0.1 = A + B.C + 0.1 + 0

c.
Here, C.D + A.0 + 1 = C + D.A + 1.0

d.
Here, 1.0 + A + C.1 = 0 + 1.A.C + 0


8.
Associative law states that when ORing or ANDing more than two variables, the result is the same regardless of the grouping of the variables.
(a) (A + B) + C = A + (B + C)
(b) (A B) C = A (B C)
Proof:
A
B
C
A+B
B+C
(A+B)+C
A+(B+C)
0
0
0
0
0
0
0
0
0
1
0
1
1
1
0
1
0
1
1
1
1
0
1
1
1
1
1
1
1
0
0
1
0
1
1
1
0
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
Here, (A + B) + C = A + (B + C) thus proved.

Distributive law states that ORing/ANDing two or more variables and then ANDing/ORing the result with a single variable is equivalent to ANDing/ORing the single variable with each of the two or more variables and then ORing/ANDing the products/sums.
(a) A (B + C) = A.B + A . C
(b) A + (B . C) = (A + B) . (A + C)
Proof:
A
B
C
B+C
A.B
A.C
A.(B+C)
A.B+A.C
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
1
0
0
0
0
0
1
1
1
0
0
0
0
1
0
0
1
0
0
0
0
1
0
1
1
0
1
1
1
1
1
0
1
1
0
1
1
1
1
1
1
1
1
1
1

Here, A.(B+C) = A.B + A.C thus proved.


9.
a.
Here,
AB + A'BC + BC
= AB + BC(A'+1)
=AB + BC
=B(A + C)

The truth table is:
A
B
C
A+C
B(A+C)
0
0
0
0
0
0
0
1
1
0
0
1
0
0
0
0
1
1
1
1
1
0
0
1
0
1
0
1
1
0
1
1
0
1
1
1
1
1
1
1


b.
Here,
PQ' + Q(P + Q) + P(P' + Q)
= PQ' + PQ + QQ + PP' + PQ
= PQ' + PQ + Q + 0
= P(Q'+Q) + Q
= P + Q

The truth table is:
P
Q
P+Q
0
0
0
0
1
1
1
0
1
1
1
1


c.
Here,
(X + Y)(XY'Z + XYZ + XY'Z')
= XY'Z + XYZ + XY'Z' + XYY'Z + XYZ + XYY'Z'
= XY'Z + XYZ + XY'Z' + 0 + 0
=XY' (Z + Z') + XYZ
= XY' + XYZ
= X(Y'+YZ)
= X(Y'+ Z)

The truth table is:
X
Y
Z
Y'
Y'+Z
X(Y'+Z)
0
0
0
1
1
0
0
0
1
1
1
0
0
1
0
0
0
0
0
1
1
0
1
1
1
0
0
1
1
1
1
0
1
1
1
1
1
1
0
0
0
0
1
1
1
0
1
1



10.
Here,
a = A.B.C
b = A' + B + C
c = A'.B'.C

Now, a + b + c = A.B.C + A'+ B + C + A'.B'.C
= B + A' + C + A'B'C
= A' + B' + C
Founder of Notehubs Nepal, Software Developer, Content Creator, Graphic Designer

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